Research
2025년 11월 12일 수요일
UNIST Researchers Uncover Causes of Overestimated Semiconductor Performance Metrics
Abstract Amorphous oxide semiconductor-based thin-film transistors (oxide TFTs) were first demonstrated in 2004. These devices offer numerous advantages, including low-temperature processing, high carrier mobility, and ultralow off-current. As a result, oxide TFTs have already been adopted for backplane technologies in modern flat-panel displays. Furthermore, their ultralow off-current has attracted considerable attention for next-generation DRAM applications. However, device reliability remains a critical challenge. In particular, gate bias stress instabilities such as negative bias temperature stress and positive bias temperature stress significantly hinder the advancement of high-mobility oxide TFTs beyond low-temperature polycrystalline silicon (LTPS) technology. Therefore, the evaluation of both field-effect mobility (FEM) and bias stability is essential for oxide TFTs. The absolute value of FEM is especially important when identifying candidate materials to replace LTPS. In this context, we have recently found that incorrect FEM evaluation methods have been widely used in numerous published studies. Such errors have resulted in overestimated FEM values, potentially compromising objective comparisons of materials and fabrication processes. This study clearly demonstrates, through both experimental data and simulation-analytical modeling, how and why FEM overestimation occurs. In particular, we derive a compact analytical expression based on conformal mapping and validate it using TCAD simulations and measurements. This dual-pronged approach establishes a general framework for identifying and correcting mobility overestimation. This study highlights the importance of recognizing and addressing mobility overestimation within the field, and that the proposed FEM evaluation method should be adopted to enable more objective and reliable comparisons. A research team affiliated with UNIST has uncovered a critical flaw in the performance evaluation metrics that have long guided researchers in semiconductor development. This discovery raises concerns that the commonly used measurement may overstate device capabilities. Jointly led by Professors Junghwan Kim and Changwook Jeong in the Graduate School of Semiconductor Materials and Devices Engineering at UNIST, the team identified how the widely used metric, field-effect mobility (FEM), can be exaggerated by up to 30 times depending on the device structure, and proposed standardized design guidelines to address this issue. FEM is a key indicator used to measure how quickly and efficiently charge carriers move within a semiconductor. A higher FEM value generally correlates with faster device operation and lower power consumption, making it a crucial parameter in the development of high-performance semiconductor chips. The researchers found that FEM measurements can be significantly overestimated in oxide thin-film transistors (TFTs)—a common semiconductor device—due to the device’s geometric structure. Specifically, they pinpointed fringe current caused by electrode geometry as the main culprit. Figure 1. TFT characteristics of IGZO TFTs with different channel/electrode configurations. (a,b) Optical microscopy (OM) images of devices with WCH > WDS and WCH < WDS. (c,e) Transfer characteristics and (d,f) field-effect mobility (FEM) as a function of L/W ratio for each configuration. (g,h) Comparison of FEM between the two configurations. In a typical TFT, current flows from the source electrode through a channel to the drain electrode. When the channel width exceeds the electrode width, fringe currents—currents that flow outside the main channel region into the surrounding areas—can form. Since measurement equipment sums all currents, including these fringe currents, the resulting FEM appears artificially inflated. This is akin to measuring an average vehicle speed on a highway while including cars veering into the shoulder lanes, giving a misleading impression of overall traffic speed. To address this, the team established new design standards for TFTs. They recommend designing the channel width to be narrower than the electrode width or, if unavoidable, ensuring that the electrode width exceeds the device length (L) by at least 12 times—that is, L/W ≤ 1/12. By adhering to these guidelines, the influence of fringe current can be minimized, enabling accurate FEM measurements that truly reflect device performance. Both experimental data and simulations confirmed that following these standards eliminates the overestimation, allowing for precise comparisons of materials and device structures. Furthermore, the team recommends measuring the hall mobility, alongside FEM. Hall mobility assesses the intrinsic electrical properties of the semiconductor material itself, independent of device geometry, providing an additional layer of verification free from structural errors. Professor Kim emphasized, "Measurement inaccuracies that overstate device performance can lead to misjudging promising materials or hinder objective comparisons, ultimately impeding progress in the semiconductor industry. Presenting a global standard for accurate FEM evaluation is a meaningful step toward more reliable research." The findings were published in ACS Nano on October 21, 2025. The research was supported by the National Research Foundation of Korea (NRF), the Ministry of Science and ICT (MSIT), and the Ministry of Trade, Industry, and Energy (MOTIE). Journal Reference Soohyun Kim, Youngjoon Lee, Seokyeon Shin, et al., "Mobility Overestimation in Thin-Film Transistors: Effects of Device Geometry and Fringe Currents," ACS Nano, (2025).
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